Computer organisation and architecture (AS Level) flashcards

Topic 7: Computer organisation and architecture

What do the address, data and control buses carry?

Address bus: addresses, one way out of the processor. Data bus: data and instructions, two ways. Control bus: timing and command signals such as read, write, clock and interrupt.

How much memory can 22 address lines address with 1 byte per location?

2²² = 4,194,304 bytes = 4 MiB.

What is the stored program concept?

The program sits in main memory as machine code, and the processor fetches and executes those instructions one at a time, in order.

Von Neumann vs Harvard architecture

Von Neumann: shared memory and buses for instructions and data; simpler and cheaper, for general-purpose machines. Harvard: separate instruction and data memories and buses, accessed at once; used in embedded systems.

What do the PC, CIR, MAR, MBR and SR hold?

PC: address of the next instruction. CIR: instruction being decoded or executed. MAR: address for the next memory read or write. MBR: value going to or from memory. SR: condition flags and interrupt-enable state.

Describe the fetch stage of the fetch-execute cycle

The PC is copied to the MAR; the instruction at that address is read into the MBR; the PC is incremented; the MBR is copied to the CIR.

Name six factors that affect processor performance

Number of cores, cache size, clock speed, word length, address bus width and data bus width.

What is the cycle time of a 1.25 GHz clock?

Cycle time = 1 ÷ frequency = 1 ÷ (1.25 × 10⁹) s = 0.8 ns.

How do a hard disk and an SSD store data?

Hard disk: spinning magnetic platters in tracks and sectors, read and written by a head on a moving arm. SSD: NAND flash cells trap charge, with no moving parts; erased in whole blocks with limited write cycles.